B2PCOE Pb-Free Manhattan Project Report Phase I - Testing
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6.1 Introduction
Current test methodologies are not adequate for qualification and acceptance of Pb-free aerospace and defense electronics. Design and production engineers rely on these tests to develop and deliver reliable electronics for the warfighter. As a consequence, the reliability of Pb-free electronics cannot currently be guaranteed to meet the reliability of A&D programs.
The greatest reliability risks associated with Pb-free electronics are the formation of tin whiskers, solder joint failures due to vibration and mechanical shocks, and the lack of validated models required to design tests and predict field lifetimes of electronics. Such models exist for SnPb only.
The formation of tin whiskers threatens the reliability of A&D systems that use Pb-free surface finishes and solders. Current tin whisker testing methods cannot predict whether a finish or solder will grow tin whiskers (Table 6, Specification and Standard Table, located in Appendix A). In addition, existing whisker mitigation strategies are only partially effective (GEIA-STD-0005-2). Reliable whisker test methods and mitigation strategies need to be developed based upon a fundamental knowledge of whisker growth mechanisms.
The testing gap associated with Pb-free will not necessarily require new equipment capabilities, but will require redefining the test parameters under which the equipment will perform. ESS, verification, validation, acceptance, and qualification tests for Pb-free production hardware require that new test parameters (temperature extremes, dwell times, vibration environments, etc.) be defined. Validated computational models need to be developed to define these parameters, and to link them to actual field conditions and service lifetimes. These models currently do not exist or are in the very embryonic stages, and have not been adequately validated. Furthermore, the fidelity of computational modeling predictions depends upon the development of accurate mechanical and physical property data for Pb-free solders, PWB laminates and component package materials. Standardized materials testing needs to be done to provide the basic material properties required for input into and validation of the computational models for Pb-free electronics.
Other Pb-free reliability issues that have been identified include PCB delamination, PTH reliability, copper dissolution, CAF formation, pad cratering, trace cracking, corrosion, and voiding problems associated with PCB finishes during the high temperature Pb-free processing. Industry standards, while available for SnPb electronics, need to be created or modified to specifically address these issues for Pb-free electronics.
6.2 Testing for Materials Properties and Product Manufacturability For Pb-Free Circuit Card Assemblies
Current Baseline Practice
The materials test methods, acceptance, and qualification standards required for evaluating materials for Pb-free assembly, including laminates, copper, components, solder paste, and fabricated PCBs, are generally the same for consumer, commercial, and A&D applications. As a result of this shared standards base, the microelectronics industry has modified, or is in the process of modifying, all the requisite standards for assessing Pb-free CCAs. The flow of test method, verification, acceptance, and qualification standards from the individual materials, through acceptance of the CCA, is shown in Figure 6.1.
All of the standards in Figure 6.1 are dependent standards required by IPC/EIA J-STD-001 "Requirements for Soldered Electrical and Electronic Assemblies" which describes materials, methods, and verification criteria for producing soldered interconnections on CCAs. All of these underlying standards are supported by numerous additional standard test methods, many of which are in the IPC-TM-650. With the exception of tin whisker testing standards and more explicit test parameters needed for consistent Pb-free testing, the impact of the transition to Pb-free CCAs will be minimal due to the additional changes in these standards, since many have been created or modified for Pb-free. The greater impact for A&D products is in the extensive verification, validation, acceptance, and qualification testing that will be required for manufacturing Pb-free CCAs. A list of materials properties most affected by the Pb-free transition and their underlying standards is provided in Table 6, located in the appendix.
6.2.1 PCB Materials and Manufacturing for Pb-free CCAs
The individual materials for fabricating PCBs, including laminate, surface finishes, and copper are evaluated according to specifications shown in the proceeding tables. Of the many properties called out in these test method standards, Pb-free manufacturing for A&D will have the greatest impact on the following properties.
- Solderability for PCBs
- The standard specifies using SAC305 solder and paste. "Other Pb-free solder alloys may be used upon agreement between user and vendor."
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Solderability (Dip and Look, Wave Solder) | IPC J-STD-003B "Solderability for Printed Boards," March 2007 | Yes | Yes |
|---|
Table 6.1 Solderability for PCBs
- Electromigration
- This test method provides a means to assess the propensity for surface electrochemical migration. This test method can be used to assess soldering materials and processes.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Electromigration Testing | IPC-TM-650, Method 2.6.14.1F, "Electrochemical Migration Resistance Test," September 2000 | Yes | Yes |
|---|
Table 6.2 Electromigration Testing
- Tin Whisker Assessment of PCB
- There are no tin whisker test methods, acceptance or qualification standards, for board surface finishes for A&D electronics. The Class 1 and 2 acceptance standard JEDEC JESD201 is explicitly for components and connectors. Other sources of whisker threats come from the Pb-free surface finishes used on non-electronic hardware such as RF boxes (e.g., satellites, communication systems, RF links, radio applications), card rails (e.g., Space Shuttle Endeavor) and mechanical connectors (tin or zinc plated hardware such as screws, washers, etc).
IPC-4554 states "...the test method will be used with the understanding that the responsibility to verify the impact of potential whisker growth on a module’s long term reliability is the end users. See Appendix 6 for JEDEC/IPC PCB paragraphs."
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| PCB Tin Whiskers | No Industry Standard Test Method Exists | No | No |
|---|
Table 6.3 Tin Whisker Assessments
- Surface Finish Verification (XRF)
- This current specification is in the drafting stage.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Surface Finish Verification (XRF) | MIL-STD-1580 (Draft), "Detailed Requirements for Prohibited Materials Analysis and Incoming Inspection of External Package Plating Materials Using X-Ray Fluorescence Spectroscopy or Scanning Electron Microscopy with Energy Dispersive Spectroscopy" | Yes (Draft) | Yes (Draft) |
|---|
Table 6.4 Surface Finish Verification
- PCB Delamination
- Method 2.4.24.1 describes the method for determining the time to delamination of laminates and PCBs through the use of a thermo-mechanical analyzer (TMA).
- This test method 2.4.13.1 is designed to determine the thermal integrity of unclad or metallic clad laminates using short-term solder exposure.
- Test method 2.4.23 specifies SnPb in test. This test method is used to determine the resistance of laminate materials (both unclad and etched surfaces) to the thermal abuse of a solder dip.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| PCB Delamination Test | IPC-TM-650, Method 2.4.24.1, "Time to Delamination," December 1994 | Yes | With Modifications |
|---|---|---|---|
| IPC-TM-650, Method 2.4.13.1, "Thermal Stress of Laminates," December 1994 | Yes | With Modifications | |
| IPC-TM-650, Method 2.4.23, "Soldering Resistance of Laminate Materials," March 1979 | Yes | With Modifications |
Table 6.5 PCB Delamination
- PCB CAF Testing
- This method does not discuss exposure to thermal environments before testing. The higher temperatures associated with the insertion of Pb-free processes, along with the higher and lower environmental temperatures which will be required for a proper assessment of Pb-free reliability, may make some pre-testing conditions necessary for this test.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| PCB Conductive Anodic Filament | IPC-TM-650, Method 2.6.25, "Conductive Anodic Filament (CAF) Resistance Test: X-Y Axis," November 2003 | Yes | With Modifications |
|---|
Table 6.6 PCB CAF Testing
- PCB IST (Interconnect Stress Testing)
- Currently used for Pb-free per specifications in IPC-6012 for bare PCBs.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| PCB Interconnect Stress Testing (IST) | IPC-TM-650, Method 2.6.26, "DC Current Induced Thermal Cycling Test," November 1999 | Yes | Yes |
|---|
Table 6.7 PCB Interconnect Stress Testing
- Copper Testing
- Copper Dissolution Test
- An industry practice exists for this test, but falls short when applied to Pb-free because the problem is exacerbated due to the increased temperature conditions.
- Copper Strength and Elongation for Electrodeposited Copper
- This test determines the tensile strength in MPa (psi) and the elongation, in percentage, of electrodeposited copper plating at ambient temperatures by mechanical force testing.
- Copper Strength and Elongation, Copper Foil
- This test determines the tensile strength in MPa (psi) and the elongation (in percentage) of copper foil at ambient and elevated temperatures by mechanical force testing.
- Copper Dissolution Test
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Cu Dissolution Test | No Industry Standard Test Method Exists | No | No |
|---|---|---|---|
| PCB Copper Test, Electrodeposited Copper | IPC-2.4.18.1, "Tensile Strength and Elongation, In-House Plating," May 2004 | Yes | Yes |
| PCB Copper Test, Copper Foil | IPC-2.4.18, "Tensile Strength and Elongation, Copper Foil," August 1980 | Yes | Yes |
Table 6.8 Copper Testing
6.2.2 Component Testing for Pb-Free CCAs
Components are evaluated according to specifications shown in the proceeding tables. Of the many requirements called out in these test methods which specify particular property attributes pertaining to the performance of components, the effect of inserting Pb-free into the manufacturing stream will impact the results, and subsequently the test method for A&D applications.
- Surface Finish Verification (XRF), Component Solderability
- This current specification for XRF is presently in the drafting stage.
- The standard for component solderability describes test methods, defect definitions, acceptance criteria, and illustrations for assessing the solderability of electronic component leads, terminations, solid wires, stranded wires, lugs, and tabs. This standard also includes a test method for the Resistance to Dissolution/Dewetting of Metallization. This standard is intended for use by both vendor and user.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Surface Finish Verification (XRF) | MIL-STD-1580 (Draft), "Detailed Requirements for Prohibited Materials Analysis and Incoming Inspection of External Package Plating Materials Using X-Ray Fluorescence Spectroscopy or Scanning Electron Microscopy with Energy Dispersive Spectroscopy" | Yes (Draft) | Yes (Draft) |
|---|---|---|---|
| Component Solderability | IPC/EAC J-STD-002C, "Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires," November 2008 | Yes | Yes |
Table 6.9 Component Testing for Pb
- Component Tin Whisker
- Assessment Tin whisker test methods, acceptance and qualification standards for components do not exist for Class 3 A&D electronics. The JEDEC standard JESD22-A121A "Test Method for Measuring Whisker Growth on Tin and Tin Alloy Surface Finishes" is not a qualification standard. Its purpose is only to recommend whisker growth test conditions so that data collected industry-wide can be compared and used to improve the understanding of whisker growth. The environmental (temperature/humidity) acceptance requirements in the JEDEC standard JESD201 for Pb-free components are a minimum six-month testing period for two of the three required tests and retesting of components for almost every change in component, surface finish, or plating conditions. JESD201 states that this standard "does not apply to components with bottom-only terminations where the full plated surface is wetted during assembly (for example: QFN and BGA components, flip chip bump terminations)." Both JESD22-A121A and JESD201 are for consumer electronics only, and explicitly state they are not sufficient for A&D applications. The JESD22-A121A test method may not be sufficient for applications with special requirements, e.g., military or aerospace, while the JESD201 does not address the uncertainty of the tin whisker growth incubation period (hours to years) which confounds the qualification tests for surface finishes on printed circuit boards, components, and circuit card assemblies.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Component Tin Whisker Assessment | JESD-22-A121A, "Test Method for Measuring Whisker Growth on Tin and Tin Alloy Surface Finishes," July 2008 | No | No |
|---|---|---|---|
| JESD-201, "Environmental Acceptance Requirements for Tin Whisker Susceptibility of Tin and Tin Alloy Surface Finishes," September 2008 | No | No |
Table 6.10 Component Tin Whisker Assessment
6.2.3 Solder Testing
Solder alloy, paste, and flux testing for assembling Pb-free CCAs was one of the first areas addressed in the consumer electronics transition to Pb-free. Solders are evaluated according to specifications shown in the proceeding tables. Of the many properties called out in these test method standards, Pb-free manufacturing for A&D will have the greatest impact on the properties that follow.
- Paste Solderability Testing
- One test method (2.4.46) specifies using Sn60 solder, while the other (2.4.45) method does not mention the solder type.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Paste Solderability Testing | IPC-TM-650, Method 2.4.46 Rev. A, "Spread Test, Liquid, Paste or Solid Flux, or Flux Extracted from Solder Paste, Cored Wires or Performs,” June 2004 | Yes | With Modifications |
|---|---|---|---|
| IPC-TM-650, Method 2.4.45, "Solder Paste – Wetting Test," January 1995 | Yes | With Modifications |
Table 6.11 Solder Testing
- Surface Insulation Resistance (SIR) Testing
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Surface Insulation Resistance (SIR) | IPC-TM-650, Method 2.6.3.3 Rev. B, "Surface Insulation Resistance, Fluxes," June 2004 | Yes | Yes |
|---|
Table 6.12 SIR Testing
- Tin Pest Testing
- In addition to forming tin whiskers, tin can sometimes undergo a phase transformation from beta-tin (body centered tetragonal) into alpha-tin (diamond cubic) at temperatures below 13 °C. This transformation is called "tin pest." The change is accompanied by an increase in volume of 26 percent which results in disintegration of the tin. The maximum rate of the phase transformation appears to occur between -30 and -35 °C. Current industry practice for SnPb is currently comprised of a test which maintains an isothermal hold of -40 °C, until the tin pest appears. No test standard currently exists for assessing tin pest formation in Pb-free electronics. See Section 7.0, Reliability for more information.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Tin Pest | No Industry Standard Test Method Exists | No | No |
|---|
Table 6.13 Tin Pest Testing
- Solder Joint Tin Whisker Assessment
- There are no tin whisker test methods, acceptance, or qualification standards for solder alloys and solder pastes for A&D electronics. The tendency to form whiskers on Pb-free solder joints has been found to be increased by residual surface contamination after reflow, thermal expansion differences between the solder and the component lead material, alloy doping elements, particular rare earth additions, reflow atmosphere, and corrosion. Test method, acceptance, and qualification standards for Pb-free solder joints are needed for solder and paste developers and design engineers to quantify the propensity of solder alloys and pastes to form whiskers.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Solder Joint Tin Whisker Assessment | No Industry Standard Test Method Exists | No | No |
|---|
Table 6.14 Solder Joint Tin Whisker Assessment
Issues/Gaps/Misconceptions
- Issue: It is currently not possible to predict whisker formation and growth. Tin whisker qualification tests for surface finishes are confounded by the uncertainty of the tin whisker growth incubation period (hours to years). System reliability can be threatened by the use of Pb-free surface finishes on non-electronic hardware such as RF boxes (satellites), card rails (e.g., Space Shuttle Endeavor) and mechanical connectors (screws, washers, etc.).
- Issue: Current specifications for PCBs do not provide sufficient guidance in terms of test parameters. For example, current baseline practice for testing Pb-free PCBs requires testing of both as-fabricated boards and boards exposed to five times simulated reflow at 260 °C. The five temperature exposures were recommended by the International Electronics Manufacturing Initiative (iNEMI) based on topside reflow, bottom side reflow, one wave soldering pass, one exposure each for rework, and attaching a missing part. However, these procedures are not explicitly stated in any standard. Current baseline practice for SnPb CCAs is testing as-fabricated boards and boards exposed to three times reflow at 240 °C.
- Issue: The manufacturing process window is significantly smaller for Pb-free CCAs than SnPb CCAs. Materials suppliers and PCB manufacturers must retest and report more frequently on PCBs, components, and other materials that go into Pb-free CCAs to demonstrate manufacturing capability and quality control.
- Gap: Test methods, acceptance, and qualification standards for tin whiskers on components, board surface finishes, and solder joints do not exist for A&D electronics. More fundamental research is needed to understand the whisker growth mechanism and predictive models of whisker propensity need to be developed.
- Gap: Current specifications need to be modified for PCB delamination, CAF testing, and paste solderability. New specifications need to be developed for copper dissolution and tin pest.
- Gap: There are no predictive test methods for Pb-free interconnect failure modes such as pad lifting, pad cratering, interface delamination, and trace fracture. The current standards shown in Figure 6.1 and the preceding tables were established to eliminate other, more common failure modes. As additional failure modes and their root causes are identified, it is expected that test method standards, test conditions, acceptance standards and qualification standards for Pb-free assembly materials and PCB testing will change significantly. It is imperative that this relationship between significant failure modes and PCB properties be established, with a feedback loop into the standards, in order to improve the robustness and reliability of Pb-free assemblies and systems.
Conclusions
Current tin whisker and PCB materials testing methods are inadequate for Pb-free A&D electronics.
The formation of tin whiskers poses a high reliability risk to systems using Pb-free surface finishes and solders, including those on non-electronic hardware such as RF boxes (satellites), card rails (e.g., Space Shuttle Endeavor) and mechanical connectors (screws, washers, etc.).
Reliability of Pb-free electronics could greatly improve from whisker mitigation strategies based on fundamental knowledge of the whisker growth mechanism. Tin whisker evaluation of printed circuit board surface finishes, such as immersion tin, hot air solder leveled (HASL) Pb-free alloys, and Pb-free solder alloys and pastes needs to be addressed for A&D electronics.
Recommendations
Effective tin whisker mitigation methods need to be developed for Pb-free A&D electronics. Efforts to determine the fundamental mechanism for tin whisker growth should continue and acceleration factors for modeling need to be determined. Standard JEDEC JESD201 can serve as an interim strategy for A&D electronics until a predictive test has been accepted. Standard JEDEC JESD201 should not be used as an acceptance document for A&D electronics.
Current specifications need to be modified for PCB delamination, CAF testing, and paste solderability. New specifications need to be developed for copper dissolution and tin pest.
6.3 Material Testing for Computational Modeling
Computational modeling provides the means to predict the long-term fatigue performance of Pb-free solder interconnections in place of extensive laboratory test programs. Large-scale test programs are becoming cost prohibitive because of the growing range of materials sets, solder joint geometries and tests, as well as service environments. (See Section 7.0, Reliability, for a discussion on models.)
Modeling is used to determine hardware test parameters for verification, validation, acceptance, or qualification of Pb-free solder interconnections that are based upon actual service lifetimes rather than only "lower bounds" benchmarks, as provided by current specifications. This approach avoids under-testing the interconnections, resulting in a service reliability shortfall, or over-testing, which results in hardware over-design and excessive product scrap.
The fidelity of computational modeling predictions depends upon the accuracy of the mechanical and physical properties for the solder, as well as substrate laminate and component package materials (e.g., ceramic, plastic, etc.). Standardized material testing is required to provide accurate mechanical and physical materials properties as input data for the computational models.
Current Baseline Practice
Materials testing methods can provide early validation of the computational model predictions. Test data – stress-strain curves, strain-time curves (creep), and hysteresis loops (isothermal fatigue) – provide validation of the constitutive equation by comparing empirical and predicted curves versus temperature, strain rate, etc. In addition, the data obtained from the testing of simulated solder joints provides validation of the combined constitutive equation and finite element functions within the model.
6.3.1 Stabilization and Other Annealing Treatments
Mechanical and physical properties of metal alloys are sensitive to the as-solidified microstructure (grain size, dislocation density, etc.). Stabilizing the material microstructure prior to testing can reduce the variability of those measured properties. The stabilization treatment provided in IPC-9701A for SnPb and SnAgCu is 100 °C, 24 hours. This value is not based upon the rate kinetics of a microstructure process and may not be applicable to other Pb-free solders.
In many circumstances, solder joints are exposed to additional elevated temperature environments prior to, as well as during, service lifetimes.
Isothermal annealing treatments are used to simulate such exposures so that their impact on the mechanical and physical properties can be documented. It is necessary that metallographic cross sections be made before and after stabilization or other annealing treatment to document the resulting microstructure. Establishing stabilization treatments based upon microstructure kinetics for each alloy will be needed. Isothermal annealing treatments may also be required to simulate follow-on manufacturing and test conditions, as well as harsh service environments.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Stabilization and Other Annealing Treatments | IPC-9701A, "Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments," February 2006 | Yes | With Modifications |
|---|
Table 6.15 Stabilization Treatments
6.3.2 Time Independent Monotonic (Stress-Strain) Mechanical Properties
Time independent monotonic (stress-strain) mechanical properties are required of the Pb-free solder, printed circuit board, and component materials. Test temperatures and strain-rates must bound those values anticipated for the interconnections when exposed to service and all test conditions. The starting and ending microstructures should be documented by metallographic cross sections.
The required data are the strain-time curves, yield strength, ultimate strength, Poisson’s ratio, work hardening and work softening parameters, and static modulus. All solder compositions can be evaluated by the ASTM test methods listed in the proceeding tables. Modifications to the sample geometry and test fixture are required for test specimens having size scales equivalent to the microstructure.
The acoustic wave technique is an alternative method to obtain the elastic and shear moduli as well as Poisson’s ratio. These parameters are then referred to as dynamic properties. Some ASTM test methods do not address the microstructure size scale effect in the testing of solder alloys. The standard test specimen geometries are not adequate, and it is recommended that alternative, smaller sample geometries be considered. The list includes:
- ASTM E8/EM8 - 08
- ASTM E21 - 05
- ASTM E209 - 00 (2005)
- ASTM E111 - 04
- ASTM E143 - 02 (2008)
- ASTM E1876 - 07
Table 6.16 Time Independent Mechanical Testing
6.3.3 Time-Dependent Monotonic (Creep) Mechanical Properties
Time-dependent (creep) deformation properties are required of the solder, printed circuit board, and component materials. Test temperatures and applied stresses must bound the anticipated interconnection service and the test environments. The starting and ending microstructure should be documented by metallographic cross section techniques.
The required data consists of the strain-time curves and rate kinetics parameters of the steady-state creep stage, power law stress exponent (or sinh term exponent), and the apparent activation energy. All solder compositions can be evaluated by the ASTM test methods listed in Table 6.17. As with the methods for determining the time independent creep properties, modifications to the sample geometry and test fixture are required for test specimens having size scales equivalent to the microstructure.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Time Dependent Monotonic (Creep) Mechanical Properties | ASTM E139 - 06 Standard Test Methods for Conducting Creep, Creep-Rupture, and Stress-Rupture Tests of Metallic Materials | Yes | With Modifications |
|---|---|---|---|
| ASTM E328 - 02 (2008) Standard Test Methods for Stress Relaxation Tests for Materials and Structures | Yes | With Modifications | |
| ASTM E1457 - 07e1 Standard Test Method for Measurement of Creep Crack Growth Times in Metals | Yes | With Modifications |
Table 6.17 Time Dependent Mechanical Testing
6.3.4 Cyclic Mechanical Properties (Isothermal)
Cyclic (isothermal) test data is used to validate the model constitutive equation. The test temperatures, strain rates, and strain limits bound the interconnection service and test environments. The starting and ending microstructures should be documented by metallographic cross section techniques.
The data required from these tests illustrate the hysteresis loops, strain energy, and percent load-change (drop or rise) as a function of cycle. All solder compositions can be evaluated by the ASTM test methods listed in Table 6.18. As with the prior tests, modifications to the sample geometry and test fixture are required for test specimens having size scales equivalent to the microstructure.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Cyclic Mechanical Properties (Isothermal) | ASTM E606 - 04e1 Standard Practice for Strain-Controlled Fatigue Testing | Yes | With Modifications |
|---|---|---|---|
| ASTM E468 - 90 (2004) e1 Standard Practice for Presentation of Constant Amplitude Fatigue Test Results for Metallic Materials | Yes | With Modifications |
Table 6.18 Cyclic Mechanical Testing
6.3.5 Material Physical Properties
The critical physical property required by the computational model is the coefficient of thermal expansion. The CTE is measured over the temperature range expected of both test and service lifetime environments. The starting and ending microstructures should be documented by metallographic cross section techniques. All solder compositions can be evaluated by the ASTM test methods listed in Table 6.19. Modifications to the sample geometry and test fixture are required to test the material at size scales equivalent to the microstructure.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Material Physical Properties | ASTM E831 - 06 Standard Test Method for Linear Thermal Expansion of Solid Materials by Thermomechanical Analysis | Yes | With Modifications |
|---|---|---|---|
| ASTM E289 - 04 Standard Test Method for Linear Thermal Expansion of Rigid Solids with Interferometry | Yes | With Modifications | |
| ASTM E228 - 06 Standard Test Method for Linear Thermal Expansion of Solid Materials with a Push-Rod Dilatometer | Yes | With Modifications | |
| ASTM E1545 - 05 Standard Test Method for Assignment of the Glass Transition Temperature by Thermomechanical Analysis | Yes | With Modifications |
Table 6.19 Physical Property Testing
6.3.6 Failure Mode Analysis of Materials Test Specimens
A thorough failure mode analysis is performed after testing using metallographic cross sections to reveal the post-test microstructure, and scanning electron microscopy to assess fracture surfaces. Traditional metallographic cross sectioning techniques are used with consideration paid to the softer solder materials. Essentially, no change in current micro-sectioning techniques is required, but in some cases a focused ion beam (FIB) technique may be necessary to see some features.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Failure Mode | IPC-TM-650, Method 2.1.1 Analysis of Materials Rev. E, "Micro-sectioning, Test Specimens Manual Method," May 2004 | Yes | Yes |
|---|
Table 6.20 Failure Analysis
6.3.7 Simulated Solder Joint Testing
The testing of simulated Pb-free solder joints provides yield and failure strength data as well as early validation of the computational model.
The test conditions should bound product test and service conditions: temperatures, strain ranges, strain rates, and applied stresses (tension, compression, or shear). It is necessary to perform metallographic cross sections of the samples prior to testing to document the initial microstructure, including void formation.
There are no standardized tests for any solder joints. The ASTM test methods for adhesive joints are most relevant for solder joints; they are listed below and referenced to Table 6.21. The solder joint geometry (footprint and gap thickness) must be clearly defined and should consider the microstructure size scale effects. It is critical that the compliance of the load train be fully taken into account in order to correctly analyze and interpret the data. The tests for the simulated solder joint are:
- Time Independent Monotonic (Stress-Strain) Mechanical Properties, which includes ASTM D3165-07, and ASTM D3528-96
- Time Dependent Monotonic (Creep) Mechanical Properties (ASTM D2294-96 and ASTM D2293-96)
- Cyclic Mechanical Properties (Isothermal)
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Time Independent Monotonic (Stress Strain) Mechanical Properties | ASTM D3165 - 07 Standard Test Method for Strength Properties of Adhesives in Shear by Tension Loading of Single-Lap-Joint Laminated Assemblies | Yes | No |
|---|---|---|---|
| ASTM D3528 - 96 (2008) Standard Test Method for Strength Properties of Double Lap Shear Adhesive Joints by Tension Loading | Yes | No | |
| Time Dependent Monotonic (Creep) Mechanical Properties | ASTM D2294 - 96 (2008) Standard Test Method for Creep Properties of Adhesives in Shear by Tension Loading (Metal-to-Metal) | Yes | No |
| ASTM D2293 - 96 (2008) Standard Test Method for Creep Properties of Adhesives in Shear by Compression Loading (Metal-to-Metal) | Yes | No | |
| Cyclic Mechanical Properties (Isothermal) | No Industry Standard Test Method Exists | Yes | No |
Table 6.21 Simulated Solder Joint Testing
6.3.8 Failure Mode Analysis of Simulated Solder Joints
Simulated solder joint testing must be followed by failure mode analysis of the Pb-free solder joints. Scanning electron microscopy is performed on the fracture surfaces, followed by metallographic cross sections. Traditional metallographic cross sectioning techniques are applicable, therefore little or no change in current micro-sectioning techniques are required. Focused ion beam techniques may be required to see some features.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Failure Mode Analysis of Simulated Solder Joints | IPC-TM-650, Method 2.1.1 Rev. E, "Microsectioning, Manual Method," May 2004 | Yes | Yes |
|---|
Table 6.22 Failure Analysis of Simulated Solder Joints
Issues/Gaps/Misconceptions
- Gap: There is an absence of consistent mechanical and physical properties data from current and newly-developed Pb-free solders, which can support the fidelity needed from computational model predictions of associated interconnections.
- Gap: There is a need to determine the rate kinetics of those micro-structural processes that underlie the stabilization process in Pb-free solder (Section 6.2.1).
- Gap: In general, there are no standardized tests for simulated solder joints (Section 6.2.7).
- Gap: There is little test data and no standardized specimen geometries and test methods for evaluating the effects of Pb-free solder specimen size vis-à-vis microstructure on the mechanical and physical properties of the interconnections (Sections 6.2.2, 6.2.3, and 6.2.5).
- Gap: Due to their softness, Pb-free alloys require additional precautions during handling and/or performing failure mode analysis (Sections 6.2.6 and 6.2.8).
Conclusions
Computational modeling provides a cost-effective means to predict the fatigue performance of Pb-free solder interconnections.
Computational models are necessary to determine hardware test parameters for verification, validation, acceptance, or qualification of Pb-free solder joints based on service life requirements.
Optimizing the fidelity of computational model predictions requires accurate mechanical and physical properties of the Pb-free solder alloys to serve as input and validation data.
Recommendations
High fidelity computational models must be developed for accurately predicting the fatigue lifetime of Pb-free solder joints.
A database of accurate materials mechanical and physical properties must be compiled to provide both input and validation data for those computational models.
6.4 Circuit Card Assembly Testing (Test Vehicles and Production Hardware)
Current Baseline Practice
This section covers testing of test vehicles for measuring robustness of solders and other Pb-free materials, and for qualifying processes. These tests are often conducted to the point of failure so that reliability comparisons can be made. This section also covers testing of production hardware methods which can be used for ESS, verification, validation, acceptance, and qualification tests. These tests simulate one or more hardware lifetimes in an effort to determine the degree and type of failures that occur. The actual parameters (temperature extremes, dwell times, Power Spectral Densities (PSD), etc.) used for each test will be determined by system requirements.
6.4.1 Humidity Testing
Currently used test methods and equipment (MIL-STD-810G, Method 507.5) are adequate for humidity testing of Pb-free test vehicles. Actual test parameters will be defined by the system requirements.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Humidity Testing | MIL-STD-810G, Method 507.5, "Environmental Engineering Considerations and Laboratory Tests," October 31, 2008 | Yes | Yes |
|---|
Table 6.23 Humidity Testing
6.4.2 Thermal Shock
Currently used test methods and equipment (MIL-STD-810G, Method 503.5) are adequate for thermal shock testing of Pb-free test vehicles to failure. Thermal shock is defined as a temperature change rate of 20 °C/minute (or greater). IPC-SM-785 cautions that thermal shock cycling is not a substitute for thermal cycling because it can induce failure mechanisms not seen in thermal cycling, due to warping of the test vehicle. IPC-SM-785 recommends that thermal shock cycling only be used if the intent is to simulate a thermal shock environment.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Thermal Shock | MIL-STD-810G, Method 503.5, "Environmental Engineering Considerations and Laboratory Tests," October 31, 2008 | Yes | No |
|---|
Table 6.24 Thermal Shock
6.4.3 Thermal Cycling
Currently used test methods and equipment (IPC-SM-785 and IPC-9701) are adequate for thermal cycle testing of Pb-free test vehicles to failure and for ESS, verification, validation, acceptance, and qualification thermal cycle testing of Pb-free production hardware.
A thermal cycle of -55 °C to +125 °C with dwell times of 10-15 minutes is commonly used by A&D. The thermal cycle parameters (temperature extremes, dwell times, and ramp rates) for testing test vehicles to failure will vary depending upon the goals of the test and the resources available to conduct the testing. As a default Pb-free test condition, IPC-9701 suggests the use of a 0 to +100 °C temperature cycle with either a 10 minute or a 30+ minute dwell "depending on the reliability approach and user need." If models exist, the test results can be converted into field lifetimes (IPC-SM-785 and IPC-9701).
For production hardware, the choice of thermal cycle test parameters (temperature extremes, ramp rates, and dwell times) should be chosen so that the test is equivalent to a specific time in the field. This will require computational models that can convert the expected field conditions into accelerated test conditions.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Thermal Cycling (For ESS, Verification, Validation, and Qualification Testing) | IPC-SM-785, "Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments," November 1992 | Yes | No |
|---|---|---|---|
| IPC-9701A, "Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments," February 2006 | Yes | No | |
| GEIA-STD-0005-3, Performance Testing for Aerospace and High Performance Electronic Interconnects Containing Pb-free Solder and Finishes, June 2008 | Yes | No |
Table 6.25 Thermal Cycling
6.4.4 Vibration Testing
Currently used test methods and equipment are adequate for vibration testing of Pb-free test vehicles to the failure point, and for ESS, verification, validation, acceptance, and qualification vibration testing of Pb-free production hardware (MIL-STD-810G, Method 514.6). The PSD input parameters for testing test vehicles to failure will vary depending upon the goals of the test and the resources available to conduct the testing.
The PSD input parameters for testing of production hardware will be based on the individual system requirements. The choice of vibration test parameters (PSD levels and test durations) should be chosen so that the test is equivalent to a specific time in the field. This will require computational models that can convert the expected field conditions into accelerated test conditions.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Vibration Testing (For ESS, Verification, Validation, and Qualification Testing) | MIL-STD-810G, Method 514.6, "Environmental Engineering Considerations and Laboratory Tests," October 31, 2008 | Yes | No |
|---|
Table 6.26 Vibration Testing
6.4.5 Mechanical Shock Testing
Currently used test methods and equipment are adequate for mechanical shock testing of Pb-free test vehicles to failure point and for ESS verification, validation, acceptance, and qualification mechanical shock testing of Pb-free production hardware (MIL-STD-810G, Method 516.6). The shock pulse or Shock Response Spectrum (SRS) input parameters for testing test vehicles to failure will vary depending on the goals of the test.
The shock pulse or SRS input parameters for testing production hardware will be defined by the individual system requirements. Since SAC solders are less robust than SnPb solder under shock loading, the use of stiffeners on the circuit boards or the use of shock isolators on the boxes holding the circuit assemblies may be required to increase the reliability of the CCAs.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Mechanical Shock Testing (For Verification, Validation, and Qualification Testing) | MIL-STD-810G, Method 516.6, "Environmental Engineering Considerations and Laboratory Tests," October 31, 2008 | Yes | No |
|---|---|---|---|
| IPC/JEDEC-9703, "Mechanical Shock Test Guidelines for Solder Joint Reliability," March 2009 | Yes | No |
Table 6.27 Mechanical Shock Testing
6.4.6 Isothermal Aging
Appropriate aging of SAC solder joints before conducting testing may be essential in order to ensure that the solder has the metallurgy and mechanical properties of a solder aged several years in the field.
IPC-9701 recommends that solder joints on test vehicles should be subjected to accelerated thermal aging (e.g., 24 hours at 100 °C) in air to accelerate processes such as solder grain growth, intermetallic compound growth, and oxidation in order to yield metallurgy similar to that seen after aging in the field. The optimum conditions for thermal aging of Pb-free solder alloys prior to testing have yet to be established.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Isothermal Aging | No Industry Standard Test Method Exists | No | No |
|---|
Table 6.28 Isothermal Aging
6.4.7 Combined Environments (HALT, HAST)
Some commonly used tests combine two or more environments into one test. For example, HALT does random repetitive shock and thermal cycling at the same time. HAST combines high temperature, humidity and pressure (power-on or power-off). Currently used test methods and equipment (GMW8287 and JESD22-A110C) are adequate for HALT and HAST testing of Pb-free test vehicles to failure.
Validated computational models for converting combined environment test results into field lifetimes probably do not exist. Therefore, HALT is best used as a screening test for uncovering defects and weak spots in production hardware and not as a tool for determining reliability. HALT PSD inputs are often not well characterized which means that the resonance frequencies of the test article can be excited more (or less) than anticipated, resulting in unintentional over-testing (or under-testing) of the test article.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Combined Environments (HALT, HAST) | GMW8287, "Highly Accelerated Life Testing," February 1, 2002 | Yes | No |
|---|---|---|---|
| JESD-22-A110C, "Highly Accelerated Temperature and Humidity Stress Test (HAST)," January 2009 | Yes | No |
Table 6.29 Combined Environmental Testing
6.4.8 Electromigration Testing
As the size of solder joints decrease (e.g., the diameter of solder balls is approaching 50 microns), electromigration may become a reliability issue due to void and intermetallic formation [1, 2]. No standardized test method exists for conducting this testing.
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Electromigration Testing (Small Solder Balls) | No Industry Standard Test Method Exists | No | No |
|---|
Table 6.30 Electromigration Testing
6.4.9 Failure Mode Analysis of Test Vehicles
No change in current micro-sectioning techniques is required (IPC-TM-650, Method 2.1.1 Rev. E). Focused ion beam techniques may be required to see some features.
- Black Pad, Kirkendall Voids, Pad Cratering, Pad Lifting, Trace Cracking
There are no current standardized test methods. A pad cratering test is in development [3].
| Baseline Practice | Test and Applicable Standard | Is the Current Test Equipment Adequate for Pb-Free? | Are the Current Test Parameters Adequate for Pb-Free? |
| Failure Mode Analysis of Test Vehicles | IPC-TM-650, Method 2.1.1 Rev. E, "Microsectioning, Manual Method," May 2004 | Yes | Yes |
|---|---|---|---|
| Black Pad, Kirkendall Voids, Pad Cratering, Pad Lifting, Trace Cracking | No Industry Standard Test Method Exists | No | No |
Table 6.31 Failure Analysis of Test Vehicles
Issues/Gaps/Misconceptions
- Issue: Pb-free solders are less robust than SnPb in vibration and mechanical shock.
- Gap: Validated computational models will be needed to convert data from accelerated tests into field lifetimes and also to design hardware qualification tests that are equivalent to one or more field lifetimes.
Conclusions
Current test methods and equipment do not need to be changed. Test parameters will be supplied by the system requirements.
Validated computational models are needed to relate test parameters to service life conditions.
Recommendations
Develop new test standards where none exist (e.g., isothermal aging) and modify existing standards with appropriate test parameters (e.g., vibration PSD) for Pb-free assemblies.
Validated computational models need to be developed to convert data from accelerated tests into field lifetimes, and also to design hardware qualification tests that are equivalent to one or more field lifetimes. Detailed information on test vehicle design, test parameters, and the response of test vehicles must be generated for model development.
